HP 3000 Manuals

Allocation, Alignment, and Packing Algorithm [ HP Pascal/iX Programmer's Guide ] MPE/iX 5.0 Documentation


HP Pascal/iX Programmer's Guide

Allocation, Alignment, and Packing Algorithm 

Allocation is the assignment of memory to variables.  When the compiler
assigns one byte of memory to the variable x, you can say that both the
byte and x are allocated (the byte is allocated to x, and x is allocated
one byte of memory).

Alignment refers to the position at which a variable's share of memory
begins.  There are several types of alignment.

   *   Bit-aligned:  If the byte that the compiler allocates to x can
       begin on a bit boundary.

   *   1-byte-aligned:  If the byte that the compiler allocates must
       begin on a byte boundary.

   *   2-byte-aligned:  If the byte that the compiler allocates must
       begin on a 2-byte boundary.

   *   4-byte-aligned:  If the byte that the compiler allocates must
       begin on a 4-byte boundary.

   *   8-byte-aligned:  If the byte that the compiler allocates must
       begin on a 8-byte boundary.

For the list of possible alignments, refer to "ALIGNMENT" in the HP 
Pascal/iX Reference Manual or the HP Pascal/HP-UX Reference Manual,
depending on your implementation.

Example 

	       Click here to view figure.
            

The variables c and d are allocated one byte each, but c is bit-aligned
and d is byte aligned.

A packing algorithm determines a variable's allocation and alignment, and
the allocation and alignment of its elements or fields, if it has them.
The HP Pascal packing algorithm uses the following factors to allocate
and align a particular variable:

   *   Variable type.

   *   Whether the variable (if it is an array, record, or set) is
       unpacked, packed, or crunched.

When the compiler options TABLES or MAPINFO are ON, the program listing
contains packing information.  Refer to the HP Pascal/iX Reference 
Manual or the HP Pascal/HP-UX Reference Manual, depending on your
implementation, for more information on compiler options.



MPE/iX 5.0 Documentation