Local I/O space

A processor can directly access all I/O space in the system using the I/O controllers.

The EPAC of the source processor checks the value of the DXbr field against the appropriate bit of the Processor Agent online field in the System Configuration register of the source processor to verify that the destination processor agent is online. The EPAC of the destination processor checks to see if the EPIC online bit in its Chip Configuration register is set. If either of the online bits are not set, the request will fail with a high-priority machine check trap. See Figure 2-10 “40-bit local I/O space format”.

Figure 2-10 40-bit local I/O space format

The bits of the local I/O space address are as follows:

DXbr field (bits 6:9)—Specifies to which of the eight Hyperplane crossbar ports (connected to the EPAC chip) the request is to be routed.
Offset field (bits 33:39)—Specifies the offset into I/O space. In this space, all PCI configuration, I/O CSRs and I/O memory space must be allocated. See the section “Host-to-PCI address translation” for more information.

Local I/O space

Technical documentation

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