The I/O subsystem transfers data coherently to and
from the system main memory, eliminating the need for flushing the
processor caches. Figure 7-1 “I/O system block diagram” shows
a block diagram of the I/O subsystem based on the PCI-bus
Interface Controller (EPIC).
The EPIC provides memory-mapped access from the processor
to the I/O controllers and allows external devices to transfer
data into and out of system memory. There is one EPIC per EPAC.
Each EPIC has a pair of unidirectional links to the associated EPAC.
Each EPIC has two physical SRAM banks, one for EPIC data prefetch
and one for PCI controller-shared memory.
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